Brit Tester v0.7.0 Documentation
The Brit Tester is a portable workbench for diagnosing and validating Antminer hashboards. Connect the hashboard, open the web interface, and run the tests. Results appear in real-time.
S19/T19 76C (BM1398P) • S19 Pro 114C (BM1398P) • S19j Pro 120C and 126C (BM1362) • S19k Pro 77C (BM1366) • S19 XP (BM1368) • S19i (BM1360)
Connect: GND → +V → signals. Disconnect in reverse order: signals → +V → GND. Failing to follow this order may damage the hashboard's level shifters.
On first use (without configured network), the tester creates its own Wi-Fi network:
| Parameter | Value |
|---|---|
| SSID | BritTester |
| URL | http://192.168.4.1 |
Connect your phone or PC to this network and open the address in your browser. If already connected to your local network, use the IP displayed on the OLED screen.
If the equipment is not provisioned, a block page will appear with the ESP32 eFuse MAC. Send the MAC to support for provisioning.
Upon connecting the hashboard, the tester reads the EEPROM and selects the model automatically in ~2.6 seconds. If not recognized, select it manually in the dropdown.
| Board Code | Tester Model | ASIC |
|---|---|---|
| NBS1902 | S19/T19 76C | BM1398P |
| NBP1901 | S19Pro 114C | BM1398P |
| BHB42601/42621/42631 | S19JPro 126C | BM1362 |
| BHB42611/42612 | S19JPro 120C | BM1362 |
| BHB56902/56903 | S19kPro 77C | BM1366 |
| NBS2003 | S19i 80C | BM1360 |
🔌 Legacy EEPROM
NBS1902, NBP1901 and NBS2003 use Bitmain's Legacy format. The NBS1902 is detected automatically. If it appears as LEGACY011, select manually.
Left side panel with visual indicators of physical signals during testing. All signals use a 1.2V LDO.
| Signal | ASIC Name | Direction | Idle | Operation |
|---|---|---|---|---|
| TX | CI (Command In) | Chip 1 → N | 0V | 1.2V |
| BI | BO (Broadcast Out) | Chip 1 → N | 0V | 0V (always) |
| RST | Reset | Chip 1 → N | 0V | 1.2V (pulse) |
| CLK | XIN (Clock) | Chip 1 → N | — | 0.5–0.6V |
| RX | RI/RO (Response) | Chip N → 1 | 0.3V | 1.2V |
Click any signal to see a wave flowing through the chips on the grid. Use the Signals button on the topbar to show/hide the panel.
Hover over a chip to see: number, domain, nonces/ACKs, and failures. The map updates automatically after each test without reloading the page.
Each subsequent test assumes the previous one passed. Use LiveScan only for quick visual diagnostics before starting formal tests.
Continuous reading of the chain in near real-time. Does not execute load patterns — only light read-id/ping. Sensors are read at start and updated periodically.
LiveScan does not replace formal tests for board approval.
Chain test: turns on PIC, resets hashboard, reads EEPROM, detects chips, prepares chain, and executes basic verification. Does not send hashing jobs — only detects chips.
Chips that failed appear in red on the map.
Executes extensive patterns per chip using vectors from the SD card when available. Detects chips that pass Basic Pattern but fail under different work patterns.
Confirm the fans are on before starting. The warning modal opens automatically.
📄 SD Card
If no vector files are available on the SD, the test uses a reduced internal coverage. The log warns when this happens.
Alternative cycle requiring real SHA256 nonce. A board that passes Basic Pattern but fails here has marginal chips — they work in basic patterns but are unstable under real load.
Confirm the fans are on before starting.
Full load with real SHA256 jobs (full-header). Approves only chips that return a valid SHA256 nonce (type4). Each cycle runs until 99.5% of chips deliver at least 3 nonces.
Confirm fans are on. Select the number of cycles in the modal before starting.
| Field | Description |
|---|---|
| Theoretical TH | Theoretical capacity (freq x cores x OK chips) |
| Nonces/s | Actual rate of nonces delivered in the current cycle |
| OK Chips | Chips with at least 3 valid nonces |
| Errors | Chips that haven't reached the minimum yet |
| Freq | Frequency applied to the PLL |
💡 Tip: Closing the modal does not stop the test. To reopen, click the Mining button again in the topbar while the test is running.
| ASIC | Frequency | Model |
|---|---|---|
| BM1362 | 465 MHz | S19j Pro |
| BM1366 | 650 MHz | S19k Pro |
| BM1368 | 650 MHz | S19 XP |
| BM1398P | 525 MHz* | S19 / S19 Pro |
| BM1360 | 525 MHz | S19i |
* S19/T19 76C limited to 650 MHz even if EEPROM reports a higher value.
| Parameter | Value |
|---|---|
| Minimum nonces per chip | 3 |
| Required OK chips | 99.5% of total |
| Example 126 chips | 125 OK chips (allows 1 failure) |
| Example 76 chips | 75 OK chips (allows 1 failure) |
| Nonces in cycle | Interpretation |
|---|---|
| ≥ 10 | Normal — healthy chip |
| 5 – 9 | Slightly low — monitor |
| 3 – 4 | Borderline — potentially marginal chip |
| 1 – 2 | Below minimum — failed |
| 0 | Dead or disconnected chip |
A variation of 5 to 28 nonces among chips in the same cycle is normal — SHA256 has a random component by design.
| Panel | Sensor | Position |
|---|---|---|
| Top right | 0x48 | Air exhaust — top |
| Bottom right | 0x49 | Air exhaust — bottom |
| Top left | 0x4A | Air intake — top |
| Bottom left | 0x4B | Air intake — bottom |
Normal ranges: intake 30–50°C, exhaust 60–85°C. -- = sensor did not respond.
Click Stop on the topbar at any time. The state of the chips up to that point is preserved on the map.
Click the EEPROM button on the topbar to access the editor.
| Field | Editable | Description |
|---|---|---|
| Serial | Yes | Serial number (up to 18 characters) |
| Board | No | Board code (e.g., BHB42601) |
| ASIC | No | Chip model (e.g., BM1362) |
| Freq (MHz) | Yes | Programmed operating frequency |
| Volt (mV) | Yes | Programmed operating voltage |
| CRC Pt1/Pt2 | No | stored = calculated = OK. Mismatch = Corrupted EEPROM |
| Button | Function |
|---|---|
| Save backup (NVS) | Saves a copy in the tester's internal memory |
| Restore backup (NVS) | Recovers the saved copy to overwrite |
| Read to clone / Write clone | Clones EEPROM between two hashboards |
Always save a backup before editing. Never alter unknown calibration settings blindly.
Shows if the SD is mounted and which vector files are available. OK = external file present. internal fallback = SD mounted but without external file; firmware uses built-in vector.
Defines the number of Basic Pattern cycles (3, 5, 10, or 20).
Interface color palette selection (Current / Modern / Industrial). Saved in browser, does not alter firmware.
.bin file: update_vX_Y.bin (full bundle), firmware.bin or spiffs.bin. Type is auto-detected| Color (App) | Type |
|---|---|
| Blue | Information |
| Green | Success |
| Orange | Warning |
| Red | Error |
| Symptom | What to check |
|---|---|
| Blank page | Reflash SPIFFS via cable or send spiffs.bin |
| Model not detected | EEPROM didn't respond — select manually |
| 0 chips detected | Boost (20V), domain voltage (0.32V/chip), PIC, level shifters |
| Temperature shows -- | Hashboard powered? PIC initialized? |
| All chips red | Correct model? Power, RST, and UART OK? |
| Mining stuck at 0% | Hashboard must pass Basic Pattern first |
| Pattern+ / PT2 with raw_bytes=0 | Check amperage — requires minimum 60A for SHA256 |
| CRC Pt1/Pt2 mismatch | Corrupted EEPROM — do not write without investigating |
| "Unauthorized hardware" appears | Send the displayed eFuse MAC to support for provisioning |
| SD fails to mount | Card inserted? Class 10+? Tester auto-retries 3x on boot |
Timeout (0x107)
sdmmc_read_sectors_dma: sdmmc_send_cmd returned 0x107
Card poorly inserted, dirty contacts, or defective. Remove, clean, and reinsert.
File not found (errno=22)
Expected folder: /BM1362-pattern/pattern_8midstate.bin or /reference/BM1362-pattern/. BM1362 Mining doesn't depend on SD — uses internal job.
| Abnormal Signal | Probable Cause |
|---|---|
| CLK < 0.5V | Damaged crystal oscillator or broken chip |
| RST doesn't rise to 1.2V | Level shifters (U1/U3/U4) or short circuit |
| TX (CI) missing | Damaged level shifter or stuck chip |
| RX (RO) missing | Chip at the end not responding; check R232/R233 (S19 Pro) or R8/R9 (S19) |
| BI (BO) not 0V | Chip with a short on the broadcast signal |
💡 Dichotomic Method
Divide the chain in half and measure RO/1.2V at the midpoint to isolate which half has the problem. Repeat until you find the chip.
| Signal | ESP32-S3 GPIO |
|---|---|
| RST (Hashboard reset) | GPIO 10 |
| PLUG0 (connection detect) | GPIO 11 |
| I2C SDA (PIC/EEPROM) | GPIO 8 |
| I2C SCL (PIC/EEPROM) | GPIO 3 |
| UART TX (to ASIC) | GPIO 17 |
| UART RX (from ASIC) | GPIO 18 |
| POWER_EN | Fixed 3V3 (no ESP GPIO) |
Pinout validated on workbench for BHB42601/BM1362/126 chips. I2C at 30 kHz.